The present invention relates in general to a multifield register, and more particularly to a multifield register having a selection field for selecting a source of an information field.
Interrupts are commonly used today in data processing systems, especially in many real-time control applications. The amount of time it takes the data processing system to respond to an interrupt is called the xe2x80x9cinterrupt latency timexe2x80x9d. In most data processing systems, it is desirable to have the shortest possible interrupt latency time without reducing the normal operating performance of the data processing system. The interrupt latency time is affected by many software and hardware components of a data processing system, including the processor overhead required to enter the appropriate interrupt handler. An interrupt handler is generally a software routine used to xe2x80x9chandlexe2x80x9d or respond to that particular interrupt.
In many real-time control applications, there are a large number of potential interrupt sources. Indeed, the number of potential interrupt sources is growing as integrated circuits are moving toward becoming larger and more complex and are incorporating entire xe2x80x9csystems-on-a-chipxe2x80x9d on a single integrated circuit. In general, interrupt controllers are used to provide masking and prioritization of multiple interrupt sources in a data processing system. Interrupt controllers may range from simple software based schemes using auto-vectored interrupts and a software prioritization and dispatch method, to large, complex hardware schemes with multiple priority levels and vectoring capability.
For many application, what is desired is an interrupt handling implementation that is a compromise between the complexity and large amount of circuitry required for a purely hardware scheme, and the overhead and thus increased interrupt latency time required for a purely software scheme. Such a compromise between increased circuitry (i.e. increased semiconductor area) and increased interrupt latency time is especially necessary when the number of interrupt sources is large. What is needed is a simple hardware assist mechanism that can improve the performance of software interrupt handling schemes while requiring minimal circuitry.